The present invention relates to a semiconductor memory device fabricated as an integrated circuit, and particularly to a static memory device of the type having a redundant array of memory cells for replacing a defective memory cell.
Recently, in order to fulfil the demands for large capacity of memory devices such as memories having 256K-bits or more, the sizes of semiconductor chips on which memories are fabricated have become larger. Therefore, the yield of perfectly good chips have become low. Namely, the possibility that at least one defective memory cell exists in each of memory device chip has become large. Accordingly, in order to save such memory device chip having a small number of defective cells, a redundant scheme has been employed. Namely, at least one redundant row or column of memory cells are provide together with a regular array of memory cells and, in the case where at least one defective memory cell is present in the regular array, such defective memory cell is functionally replaced with a good memory cell in the redundant row or column of memory cells. This redundant scheme is advantageous in improving the yield of memory chips and reducing the cost in production of memory chips.
However, for a static type memory device employing a flip-flop as a memory cell, it has found that even a defective memory cell in a regular array is replaced with a good memory cell in a redundant array and access to the defective cell is inhibited, abnormal current still flows through the defective memory cell or cells and hence such memory device fails to satisfy a current characteristic as required.